Papers › Superconducting processor design optimization for quantum error correction performance
Superconducting processor design optimization for quantum error correction performance
Xiaotong Ni, Ziang Wang, Rui Chao, Jianxin Chen
The archive published only this paper's code-link row. Authors, date and abstract are from arXiv's metadata (CC0), read from the Kaggle arXiv metadata snapshot of 2026-09-12 where its title matched the archive's; the title is the archive's.
In the quest for fault-tolerant quantum computation using superconducting processors, accurate performance assessment and continuous design optimization stands at the forefront. To facilitate both meticulous simulation and streamlined design optimization, we introduce a multi-level simulation framework that spans both Hamiltonian and quantum error correction levels, and is equipped with the capability to compute gradients efficiently. This toolset aids in design optimization, tailored to specific objectives like quantum memory performance. Within our framework, we investigate the often-neglected spatially correlated unitary errors, highlighting their significant impact on logical error rates. We exemplify our approach through the multi-path coupling scheme of fluxonium qubits.
Code
Repository list and official/mentioned flags are the archive's, frozen 2025-07-28. Reachability, where shown, is from one Syntology probe window (2026-09-16 to 2026-09-18); repositories not probed show nothing. GitHub stars are not tracked.
Code Syntology ran Syntology
Not run by Syntology. Nothing on this page verifies that the listed code works.
Results from the paper archive 2025-07-28
No leaderboard rows for this paper in the archive.
Report a problem or propose a change · a person checks every report against the paper or source before anything changes; decisions are listed on /corrections