Papers › Partial Order Pruning: for Best Speed/Accuracy Trade-off in Neural Architecture Search
Partial Order Pruning: for Best Speed/Accuracy Trade-off in Neural Architecture Search
Xin Li, Yiming Zhou, Zheng Pan, Jiashi Feng
Achieving good speed and accuracy trade-off on a target platform is very important in deploying deep neural networks in real world scenarios. However, most existing automatic architecture search approaches only concentrate on high performance. In this work, we propose an algorithm that can offer better speed/accuracy trade-off of searched networks, which is termed "Partial Order Pruning". It prunes the architecture search space with a partial order assumption to automatically search for the architectures with the best speed and accuracy trade-off. Our algorithm explicitly takes profile information about the inference speed on the target platform into consideration. With the proposed algorithm, we present several Dongfeng (DF) networks that provide high accuracy and fast inference speed on various application GPU platforms. By further searching decoder architectures, our DF-Seg real-time segmentation networks yield state-of-the-art speed/accuracy trade-off on both the target embedded device and the high-end GPU.
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Results from the paper archive 2025-07-28
| Task | Dataset | Model | Metric | Value | Rank at snapshot | Leaderboard | Report |
|---|---|---|---|---|---|---|---|
| Semantic Segmentation | BDD100K val | DF1-Seg | mIoU | 42.5(82.3fps) | #15 of 24 | Archive leaderboard | report |
| Semantic Segmentation | BDD100K val | DF2-Seg | mIoU | 47.8(53.4fps) | #16 of 24 | Archive leaderboard | report |
Ranks are positions in the archive's leaderboards as they stood at the 2025-07-28 snapshot. Results published since then are not among these rows, so a rank here is not a current standing.
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