Papers › Easy and structured approach for software and firmware co-simulation for bus centric designs

Easy and structured approach for software and firmware co-simulation for bus centric designs

20 Oct 2021arXiv:2110.10447links table onlyarchive 2025-07-28

Michał Kruszewski

The archive published only this paper's code-link row. Authors, date and abstract are from arXiv's metadata (CC0), read from the Kaggle arXiv metadata snapshot of 2026-09-12 where its title matched the archive's; the title is the archive's.

Although software and firmware co-simulation is gaining popularity, it is still not widely used in the FPGA designs. This work presents easy and structured approach for software and firmware co-simulation for bus centric designs. The proposed approach is very modular and software language agnostic. The only requirement is that the firmware design is accessible via some kind of system bus. The concept has been used for testing DAQ system being developed for high energy physics experiment.

PaperPDFCode

Code

m-kru/fusesoc-cosimulation-example officialmentioned in papermentioned on GitHub report

Repository list and official/mentioned flags are the archive's, frozen 2025-07-28. Reachability, where shown, is from one Syntology probe window (2026-09-16 to 2026-09-18); repositories not probed show nothing. GitHub stars are not tracked.

Code Syntology ran Syntology

Not run by Syntology. Nothing on this page verifies that the listed code works.

Results from the paper archive 2025-07-28

No leaderboard rows for this paper in the archive.

Report a problem or propose a change · a person checks every report against the paper or source before anything changes; decisions are listed on /corrections