{"about":{"site":"https://codewithpapers.app","non_affiliation":"Code with Papers and Syntology are not affiliated with, endorsed by, or sponsored by Papers with Code, Meta, or the pwc-archive mirror.","licence":"CC BY-SA 4.0","licence_url":"https://creativecommons.org/licenses/by-sa/4.0/legalcode","attribution":"https://codewithpapers.app/attribution","modified":"archive material modified by Syntology; see the attribution page"},"url":"/paper/the-implementation-of-a-deep-recurrent-neural","title":"The implementation of a Deep Recurrent Neural Network Language Model on a Xilinx FPGA","arxiv_id":"1710.10296","date":"2017-10-26","proceeding":null,"authors":["Yufeng Hao","Steven Quigley"],"abstract":"Recently, FPGA has been increasingly applied to problems such as speech\nrecognition, machine learning, and cloud computation such as the Bing search\nengine used by Microsoft. This is due to FPGAs great parallel computation\ncapacity as well as low power consumption compared to general purpose\nprocessors. However, these applications mainly focus on large scale FPGA\nclusters which have an extreme processing power for executing massive matrix or\nconvolution operations but are unsuitable for portable or mobile applications.\nThis paper describes research on single-FPGA platform to explore the\napplications of FPGAs in these fields. In this project, we design a Deep\nRecurrent Neural Network (DRNN) Language Model (LM) and implement a hardware\naccelerator with AXI Stream interface on a PYNQ board which is equipped with a\nXILINX ZYNQ SOC XC7Z020 1CLG400C. The PYNQ has not only abundant programmable\nlogic resources but also a flexible embedded operation system, which makes it\nsuitable to be applied in the natural language processing field. We design the\nDRNN language model with Python and Theano, train the model on a CPU platform,\nand deploy the model on a PYNQ board to validate the model with Jupyter\nnotebook. Meanwhile, we design the hardware accelerator with Overlay, which is\na kind of hardware library on PYNQ, and verify the acceleration effect on the\nPYNQ board. Finally, we have found that the DRNN language model can be deployed\non the embedded system smoothly and the Overlay accelerator with AXI Stream\ninterface performs at 20 GOPS processing throughput, which constitutes a 70.5X\nand 2.75X speed up compared to the work in Ref.30 and Ref.31 respectively.","url_abs":"http://arxiv.org/abs/1710.10296v3","url_pdf":"http://arxiv.org/pdf/1710.10296v3.pdf","source":{"archive":"pwc-archive (Hugging Face), CC BY-SA 4.0","snapshot":"2025-07-28","licence_url":"https://creativecommons.org/licenses/by-sa/4.0/legalcode","row_kind":"abstracts"},"code_links":[{"paper_slug":"the-implementation-of-a-deep-recurrent-neural","repo_url":"https://github.com/hillhao/PYNQ-project","is_official":1,"mentioned_in_paper":1,"mentioned_in_github":1,"framework":"tf","reach":null}],"tasks":[{"task_slug":null,"task_name":"CPU"},{"task_slug":"language-modeling","task_name":"Language Modeling"},{"task_slug":"language-modelling","task_name":"Language Modelling"},{"task_slug":"speech-recognition","task_name":"Speech Recognition"},{"task_slug":"speech-recognition-1","task_name":"speech-recognition"}],"methods":[{"method_slug":"speed","method_name":"SPEED"}],"datasets_introduced":[],"methods_introduced":[],"results":[],"syntology":{"syntology_url":null,"atlas_url":null,"mcp":null,"developers":"https://syntology.ai/developers"},"arxiv_metadata":null,"syntology_extracted_results":null}