{"about":{"site":"https://codewithpapers.app","non_affiliation":"Code with Papers and Syntology are not affiliated with, endorsed by, or sponsored by Papers with Code, Meta, or the pwc-archive mirror.","licence":"CC BY-SA 4.0","licence_url":"https://creativecommons.org/licenses/by-sa/4.0/legalcode","attribution":"https://codewithpapers.app/attribution","modified":"archive material modified by Syntology; see the attribution page"},"url":"/paper/quark-implementing-convolutional-neural","title":"Quark: Implementing Convolutional Neural Networks Entirely on Programmable Data Plane","arxiv_id":"2501.15100","date":"2025-01-25","proceeding":null,"authors":["Mai Zhang","Lin Cui","Xiaoquan Zhang","Fung Po Tso","Zhen Zhang","Yuhui Deng","Zhetao Li"],"abstract":"The rapid development of programmable network devices and the widespread use of machine learning (ML) in networking have facilitated efficient research into intelligent data plane (IDP). Offloading ML to programmable data plane (PDP) enables quick analysis and responses to network traffic dynamics, and efficient management of network links. However, PDP hardware pipeline has significant resource limitations. For instance, Intel Tofino ASIC has only 10Mb SRAM in each stage, and lacks support for multiplication, division and floating-point operations. These constraints significantly hinder the development of IDP. This paper presents \\quark, a framework that fully offloads convolutional neural network (CNN) inference onto PDP. \\quark employs model pruning to simplify the CNN model, and uses quantization to support floating-point operations. Additionally, \\quark divides the CNN into smaller units to improve resource utilization on the PDP. We have implemented a testbed prototype of \\quark on both P4 hardware switch (Intel Tofino ASIC) and software switch (i.e., BMv2). Extensive evaluation results demonstrate that \\quark achieves 97.3\\% accuracy in anomaly detection task while using only 22.7\\% of the SRAM resources on the Intel Tofino ASIC switch, completing inference tasks at line rate with an average latency of 42.66$\\mu s$.","url_abs":"https://arxiv.org/abs/2501.15100v2","url_pdf":"https://arxiv.org/pdf/2501.15100v2.pdf","source":{"archive":"pwc-archive (Hugging Face), CC BY-SA 4.0","snapshot":"2025-07-28","licence_url":"https://creativecommons.org/licenses/by-sa/4.0/legalcode","row_kind":"links_only","authors_date_abstract":"arXiv metadata, CC0 1.0 (https://info.arxiv.org/help/license), from the Kaggle arXiv metadata snapshot of 2026-09-12"},"code_links":[{"paper_slug":"quark-implementing-convolutional-neural","repo_url":"https://github.com/antlab-repo/quark-cnn-p4","is_official":1,"mentioned_in_paper":1,"mentioned_in_github":0,"framework":"none","reach":null}],"tasks":[],"methods":[],"datasets_introduced":[],"methods_introduced":[],"results":[],"syntology":{"atlas_url":null,"mcp":null,"developers":"https://syntology.ai/developers"},"arxiv_metadata":null,"syntology_extracted_results":null}