{"about":{"site":"https://codewithpapers.app","non_affiliation":"Code with Papers and Syntology are not affiliated with, endorsed by, or sponsored by Papers with Code, Meta, or the pwc-archive mirror.","licence":"CC BY-SA 4.0","licence_url":"https://creativecommons.org/licenses/by-sa/4.0/legalcode","attribution":"https://codewithpapers.app/attribution","modified":"archive material modified by Syntology; see the attribution page"},"url":"/paper/neural-network-hardware-co-design-for","title":"Neural Network-Hardware Co-design for Scalable RRAM-based BNN Accelerators","arxiv_id":"1811.02187","date":"2018-11-06","proceeding":null,"authors":["Yulhwa Kim","HyungJun Kim","Jae-Joon Kim"],"abstract":"Recently, RRAM-based Binary Neural Network (BNN) hardware has been gaining\ninterests as it requires 1-bit sense-amp only and eliminates the need for\nhigh-resolution ADC and DAC. However, RRAM-based BNN hardware still requires\nhigh-resolution ADC for partial sum calculation to implement large-scale neural\nnetwork using multiple memory arrays. We propose a neural network-hardware\nco-design approach to split input to fit each split network on a RRAM array so\nthat the reconstructed BNNs calculate 1-bit output neuron in each array. As a\nresult, ADC can be completely eliminated from the design even for large-scale\nneural network. Simulation results show that the proposed network\nreconstruction and retraining recovers the inference accuracy of the original\nBNN. The accuracy loss of the proposed scheme in the CIFAR-10 testcase was less\nthan 1.1% compared to the original network. The code for training and running\nproposed BNN models is available at:\nhttps://github.com/YulhwaKim/RRAMScalable_BNN.","url_abs":"http://arxiv.org/abs/1811.02187v2","url_pdf":"http://arxiv.org/pdf/1811.02187v2.pdf","source":{"archive":"pwc-archive (Hugging Face), CC BY-SA 4.0","snapshot":"2025-07-28","licence_url":"https://creativecommons.org/licenses/by-sa/4.0/legalcode","row_kind":"abstracts"},"code_links":[{"paper_slug":"neural-network-hardware-co-design-for","repo_url":"https://github.com/YulhwaKim/RRAMScalable_BNN","is_official":1,"mentioned_in_paper":1,"mentioned_in_github":1,"framework":"none","reach":null}],"tasks":[{"task_slug":"neural-network-simulation","task_name":"Neural Network simulation"}],"methods":[],"datasets_introduced":[],"methods_introduced":[],"results":[],"syntology":{"atlas_url":null,"mcp":null,"developers":"https://syntology.ai/developers"},"arxiv_metadata":null,"syntology_extracted_results":null}