{"about":{"site":"https://codewithpapers.app","non_affiliation":"Code with Papers and Syntology are not affiliated with, endorsed by, or sponsored by Papers with Code, Meta, or the pwc-archive mirror.","licence":"CC BY-SA 4.0","licence_url":"https://creativecommons.org/licenses/by-sa/4.0/legalcode","attribution":"https://codewithpapers.app/attribution","modified":"archive material modified by Syntology; see the attribution page"},"url":"/paper/cross-layer-optimization-for-high-speed","title":"Cross-layer Optimization for High Speed Adders: A Pareto Driven Machine Learning Approach","arxiv_id":"1807.07023","date":"2018-07-18","proceeding":null,"authors":["Yuzhe Ma","Subhendu Roy","Jin Miao","Jiamin Chen","Bei Yu"],"abstract":"In spite of maturity to the modern electronic design automation (EDA) tools,\noptimized designs at architectural stage may become sub-optimal after going\nthrough physical design flow. Adder design has been such a long studied\nfundamental problem in VLSI industry yet designers cannot achieve optimal\nsolutions by running EDA tools on the set of available prefix adder\narchitectures. In this paper, we enhance a state-of-the-art prefix adder\nsynthesis algorithm to obtain a much wider solution space in architectural\ndomain. On top of that, a machine learning-based design space exploration\nmethodology is applied to predict the Pareto frontier of the adders in physical\ndomain, which is infeasible by exhaustively running EDA tools for innumerable\narchitectural solutions. Considering the high cost of obtaining the true values\nfor learning, an active learning algorithm is utilized to select the\nrepresentative data during learning process, which uses less labeled data while\nachieving better quality of Pareto frontier. Experimental results demonstrate\nthat our framework can achieve Pareto frontier of high quality over a wide\ndesign space, bridging the gap between architectural and physical designs.","url_abs":"http://arxiv.org/abs/1807.07023v2","url_pdf":"http://arxiv.org/pdf/1807.07023v2.pdf","source":{"archive":"pwc-archive (Hugging Face), CC BY-SA 4.0","snapshot":"2025-07-28","licence_url":"https://creativecommons.org/licenses/by-sa/4.0/legalcode","row_kind":"abstracts"},"code_links":[{"paper_slug":"cross-layer-optimization-for-high-speed","repo_url":"https://github.com/yuzhe630/adder-DSE","is_official":1,"mentioned_in_paper":1,"mentioned_in_github":0,"framework":"none","reach":null}],"tasks":[{"task_slug":"active-learning","task_name":"Active Learning"},{"task_slug":"machine-learning","task_name":"BIG-bench Machine Learning"}],"methods":[],"datasets_introduced":[],"methods_introduced":[],"results":[],"syntology":{"atlas_url":null,"mcp":null,"developers":"https://syntology.ai/developers"},"arxiv_metadata":null,"syntology_extracted_results":null}