{"about":{"site":"https://codewithpapers.app","non_affiliation":"Code with Papers and Syntology are not affiliated with, endorsed by, or sponsored by Papers with Code, Meta, or the pwc-archive mirror.","licence":"CC BY-SA 4.0","licence_url":"https://creativecommons.org/licenses/by-sa/4.0/legalcode","attribution":"https://codewithpapers.app/attribution","modified":"archive material modified by Syntology; see the attribution page"},"url":"/paper/an-algorithm-for-reversible-logic-circuit","title":"An Algorithm for Reversible Logic Circuit Synthesis Based on Tensor Decomposition","arxiv_id":"2107.04298","date":"2021-07-09","proceeding":null,"authors":["Hochang Lee","Kyung Chul Jeong","Daewan Han","Panjin Kim"],"abstract":"An algorithm for reversible logic synthesis is proposed. The task is, for a given $n$-bit substitution map $P_n: \\{0,1\\}^n \\rightarrow \\{0,1\\}^n$, to find a sequence of reversible logic gates that implements the map. The gate library adopted in this work consists of multiple-controlled Toffoli gates denoted by $C^m\\!X$, where $m$ is the number of control bits that ranges from 0 to $n-1$. Controlled gates with large $m \\,\\,(>2)$ are then further decomposed into $C^0\\!X$, $C^1\\!X$, and $C^2\\!X$ gates. A primary concern in designing the algorithm is to reduce the use of $C^2\\!X$ gate (also known as Toffoli gate) which is known to be universal. The main idea is to view an $n$-bit substitution map as a rank-$2n$ tensor and to transform it such that the resulting map can be written as a tensor product of a rank-($2n-2$) tensor and the $2\\times 2$ identity matrix. Let $\\mathcal{P}_n$ be a set of all $n$-bit substitution maps. What we try to find is a size reduction map $\\mathcal{A}_{\\rm red}: \\mathcal{P}_n \\rightarrow \\{P_n: P_n = P_{n-1} \\otimes I_2\\}$. %, where $I_m$ is the $m\\times m$ identity matrix. One can see that the output $P_{n-1} \\otimes I_2$ acts nontrivially on $n-1$ bits only, meaning that the map to be synthesized becomes $P_{n-1}$. The size reduction process is iteratively applied until it reaches tensor product of only $2 \\times 2$ matrices.","url_abs":"https://arxiv.org/abs/2107.04298v4","url_pdf":"https://arxiv.org/pdf/2107.04298v4.pdf","source":{"archive":"pwc-archive (Hugging Face), CC BY-SA 4.0","snapshot":"2025-07-28","licence_url":"https://creativecommons.org/licenses/by-sa/4.0/legalcode","row_kind":"links_only","authors_date_abstract":"arXiv metadata, CC0 1.0 (https://info.arxiv.org/help/license), from the Kaggle arXiv metadata snapshot of 2026-09-12"},"code_links":[{"paper_slug":"an-algorithm-for-reversible-logic-circuit","repo_url":"https://github.com/ReversibleLogicCircuit/SizeReduction","is_official":1,"mentioned_in_paper":1,"mentioned_in_github":1,"framework":"none","reach":null}],"tasks":[],"methods":[],"datasets_introduced":[],"methods_introduced":[],"results":[],"syntology":{"atlas_url":null,"mcp":null,"developers":"https://syntology.ai/developers"},"arxiv_metadata":null,"syntology_extracted_results":null}